After the high temperature sd and silicide annealing cycles, the dummy gate was removed and metal gate electrodes were deposited last. However, the use of high k metal gate require a ntype metal and a ptype. Although a great deal of research has been conducting, many problems are still remained on high k metal gate stacks. Osburn north carolina state university, raleigh, nc 27695 introduction high k gate dielectrics and metal gates are being widely studied for next generation devices,s dry etched and all the other zro.
Interface dipole engineering in metal gate high k stacks. All of our gate designs can be setup to swing with a set of our custom hinge kits, or to slide using one of our slide gate kits with all components bolting together and no welding required. It will also be shown that while gate first and gate last high k metal gate stacks have differing thermal budgets and workfunction metals. Pdf work function setting in highk metal gate devices. Pdf 2007 saw the introduction of the first highkmetal gate hkmg devices into the marketplace. The present work addresses the investigation of high. The trigate transistor architecture introduces the fewest changes to conventional planar transistor processing. Transistor performance has been boosted by other means. A study on highk metal gate stack mosfets with rare earth. A positive voltage on the gate of an nmos transistor drives.
Highkmetal gate the technology in an intel chip that enabled the fabrication of 45 nm microprocessors in 2007. One way to achieve the desired effective work function is to use dipole effect by adding metal elements into high k dielectric film 12. However, different schemes to integrate those novel materials have been recently proposed, traditionally referred to as gate first and gate last. As transistor size continues to shrink, sio2polysilicon gate stack has been replaced by high k metal gate to enable further scaling. Why is a metal used instead of polysilicon for highk gate.
Tsmcs industryleading 28nm process technology mainly uses high k metal gate hkmg gate last technology. High kmetal gate the technology in an intel chip that enabled the fabrication of 45 nm microprocessors in 2007. Over years was the material of choice as gate insulator. However, it became clear that there was a reaction. Highk, metal gate, channel materials new material integration in. High performance 32nm logic technology featuring 2nd. Le royer c, clavelier l, tabone c, deguet c, sanchez l, hartmann jm, roure mc, grampeix h, deleonibus s. Gatefirst highkmetal gate dram technology for low power. Evolutionary search for new highk dielectric materials.
Intel made a significant breakthrough in the 45nm process by using a highk hik material called hafnium to replace the transistors silicon dioxide gate dielectric, and by using new metals to replace the n and pmos polysilicon gate electrodes. Ald highk as a common gate stack solution for nanoelectronics. Although metal gatehighk stacks are commonly used in metaloxidesemiconductor fieldeffecttransistors mosfets in the 45 nm technology node and. Interface dipole engineering in metal gatehighk stacks. The past, present and future of highkmetal gates citeseerx. Comparison of 32nm highk metal gate predictive technology. The incorporation of high k dielectrics with metal gates into a manufacturable, high volume transistor process is the result of tremendous ingenuity and effort by many scientists and engineers 1. With a high k material as gate dielectric, effective oxide thickness eot can be further scaled down without increasing gate tunneling leakage. Illustrated guide to highk dielectrics and metal gate. The equivalent oxide thickness eot value of hfo 2 was 7. Driveway gates can be purchased plain, with ornate design elements, or customized with our own line of spear. Cmos technology scaling gate length has not scaled proportionately with device pitch 0.
Highkmetal gates in the 2010s ieee conference publication. High k hk dielectrics are a solution to overcome these limitations. Dummy fill is typically related with three different type dummy. The introduction of novel gate stack materials high k metal gate has enabled the resumption of moores law at the 4532nm nodes, when conventional polysion gate stacks ran out of steam.
Integration of highkmetal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access. This marked the return of metal gate technology on silicon for the first time since polysilicon gates became ubiquitous in the early 1970s. Also, using metal as a gate electrode mg, the polysilicon gate pg depletion effect is. In both integration schemes, getting the right work functions and threshold voltages for ntype. Device scaling ofhigh performance mosfet with metal gate. The incorporation of high k dielectrics with metal gates into a manufacturable, high volume transistor process is the result of tremendous ingenuity and effort by many scientists and engineers. The first metal deposit on the gate area is the pmos work function metal, followed by the nmos work function metal the pmos metal is removed from nmos transistors prior to deposition of the second work function metal. A 32nm logic technology featuring 2ndgeneration highk. This change in technology was significant for a number of reasons. The high k gate oxide layer that intel implemented on the penryn was not compatible with a polysilicon gate electrode, so the change also meant further improvements in performance and reductions in current leakage due to the more efficient way in which the metal gates transfer current. Illustrated guide to highk dielectrics and metal gate electrodes. Highkmetal gate technology represents a fundamental and their effect reduce with geometrical scaling ofthe chip. Chau and colleagues explained the problem that led to the use of a metal gate in detail in high k metal gate stack and its mosfet characteristics, ieee electron.
Enabling metal depostition technology for highk metal. Iedm 2009 17 key device features y30nm gate length with 112. Using high k metal gate hkmg stacks can reduce the gate leakage and eliminate the poly gate depletion 37 38 39. Complete dfm model for high performance computing socs. Dualepitaxy and multiple stressors are essential to boost the device performance. Effects of highk dielectric with metal gate for electrical. Globalfoundries, intel, tsmc and umc are developing andor expanding their efforts at. The sio2 eot of the hk plus the interface layer il that forms between the hk and the silicon is 1. May 11, 2017 once youve replace the sio2 gate oxide with highk dielectrics hafnium oxide or zirconium oxide you band diagram is completely different.
Although metal gatehighk stacks are commonly used in metaloxide semiconductor fieldeffecttransistors mosfets in the 45 nm technology node and. Ma yale university, center for microelectronics, and department of electrical engineering new haven, ct 065208284 introduction high k dielectrics are being actively pursued by the semiconductor industry to replace sio2 as the gate dielectric for future generations of cmos transistors. Pdf highkmetal gate stacks in gate first and replacement. A 250nm thick tetraethylorthosilicate teos oxide was deposited. High k metal gate stacks in gate first and replacement gate schemes. Keywords18 nm nmos, highk dielectric, metal gate, silvaco. Intel was the first to use high k metal gate in its 45nm product. Cmos integration of highkmetal gate transistors in. High performance 2220nm finfet cmos devices with advanced. As metaloxidesemiconductor fieldeffect transistors mosfets have decreased in size, the thickness of the silicon dioxide gate dielectric has steadily decreased to increase the gate capacitance and thereby drive current, raising device performance. For high k metal gate integration, one of the major challenges with gate first flow is to achieve and maintain desired effective work function and eot after high thermal budget. Intel made a significant breakthrough in the 45nm process by using a high k hi k material called hafnium to replace the transistors silicon dioxide gate dielectric, and by using new metals to replace the n and pmos polysilicon gate electrodes. Advanced metal gatehighk dielectric stacks for high. The evolution of highk metal gate transistors, from the first planar 45nm to the latest 14nm node.
Gate leakage current, polysilicon gate depletion, boron penetration. Metal gate high k dielectric stack metal gate elect rodes may be more effective than polysi in screening the high k so phonons from coupling to the channel under inversion conditions, resulting in improved channel mobility 78. Gate depots line of deluxe powdercoated steel driveway entry gates are built to last a lifetime. By david lammers qualcomm cdma technologies said it will not use a highkmetal gate hkmg process for most of the chips it makes at the 28 nm node, sticking with a polysion gate stack.
The highk dielectric concept was introduced to resolve the excessive gate leakage issue of the scaled sio2 based gate oxide by increasing the physical thickness. These new materials along with the right process recipe reduced the nmos gate leakage by 25x and pmos. The scaling of complementary metal oxide semiconductor cmos transistors has led to the silicon dioxide layer used as a gate dielectric becoming so. Compared to the gate first technology, the gate last offering provides more advantages, including lower leakage current and better chip performance. The contents firstly include the deposition of zirconium dioxide and hafnium dioxide from the gas phase, using organometallic precursors, and their physicochemical characterization. In this work the combination of ultra thin high k gate dielectric, near midgap metal gate workfunction, low doping in the channel and optimized fin dimensions enable us to fully enhance.
Interface dipole engineering in metal gatehighk stacks core. Hkmg is defined as high k metal gate very frequently. The socalled gatefirst metal inserted polysi and gatelast replacement metal gate approaches have both pros and cons, as summarized in fig. Chau and colleagues explained the problem that led to the use of a metal gate in detail in highkmetalgate stack and its mosfet characteristics, ieee electron. Enabling effective work function tuning by rfpvd nmos. High k metal gate stacks have been extensively investigated in the context of cmos logic, both for gate. However, integration in dram periphery poses unique constraints on the choice of materials and process. The gate dielectric consists of a high k material the gate electrode is made of metal intel has succeeded in integrating these innovations and creating transistors with recordsetting performance, and with dramatically reduced current leakage intel believes that high k metal gate can be implemented in the 45nm manufacturing. Silicon dioxide sio 2 has been used as a gate oxide material for decades. More recently, intel introduced in their 32nm technology a slightly different scheme where the high k is deposited last, right before the metal gate electrodes, and after the complete removal of the dummy gates. This marked the return of metal gate technology on silicon for the first time since polysilicon gates.
Nov 14, 2007 the main features of intels 45nm technology are the use of hfo2 as the high k dielectric material, tin for the nfet replacement gate, and tin barrier alloyed with a work function metal for the pfet replacement gate. As elements in the chip were being reduced to 45 nanometers, the gate dielectric began to lose its insulating dielectric quality and exhibited too much leakage. Pdf, cmos integration of highkmetal gate transistors. Device scaling ofhigh performance mosfet with metal gate high. Two different integration approaches have been implemented in high volume production. Highk materials and metal gates for cmos applications. Dual workfunction wf with an advanced high k metal gate hkmg stack is deployed in an integrationfriendly cmos process flow. The company described the rationale behind the strategy, which because of qualcomms size will have a major impact on the foundry business, at the 2010. Trigate transistor architecture with highk gate dielectrics. They showed a working sram array with good process yield, performance, and reliability. High k gate dielectrics for future cmos technology t.
Vgs and b ids ds characteristics of nchannel right panel and pchannel left panel. Currently, our 28nm is in volume production for several customer products. Dielectric breakdown in a 45 nm highkmetal gate process. Recent trend from topdown lithography to selfalignment and bottomup patterning approaches source. Cmp solutions for the integration of high k metal gate. Gate first flow requires high thermal uniformity with different rfpvd tn process budget after metal gate process, which limits work conditions on si02 gatc.
Comparison of 32nm high k metal gate predictive technology model cmos and mosfetlike cnfet compact model based domino logic circuits saravana maruthamuthu, wireless group infineon technologies india private limited, mosakgsa workshop, december 8th 2010, san francisco ca. Highkmetal gate article about highkmetal gate by the. A 22nm soc platform technology featuring 3d tri gate and high k metal gate, optimized for ultra low power, high performance and high density soc applications conference paper dec 2012. This paper mainly focuses on diffusion od dummy fill because the diffusion uniformity is directly related with shallow trench isolation sti and rapid temperature annealing rta process that linked with. Then, workfunction metal electrodes are deposited followed by a gate fill process. Sram with hkmg process has yielded, complements foundrys 3228nm technology hsinchu, taiwan, nov. Combining the voltage scaling of each mechanism, v max trends can be predicted for future technologies. A study on highk metal gate stack mosfets with rare. Thus, metal gate must be also introduced with high k gate dielectrics. From this study, we find the suitable combination materials between the highk and metal gate, and how it is a good affected on the electrical. The penryn processor debuted intels 45nm fabrication, and was the first to utilize highk gate dielectrics and metal gate electrodes. The remaining gate space is filled with aluminum and excess is polished away to leave a finished high k metal gate transistor.
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